STM32WB55CG STM32WB series of Wireless MCUs

The STM32WB dual-core MCUs with wireless support are based on an Arm® Cortex®‐M4 core running at 64 MHz (application processor) and an Arm® Cortex®‐M0+ core at 32 MHz (network processor). With two totally independent cores, this innovative architecture is optimized for real‑time execution (radio‑related software processing), resource use flexibility, power management, and BOM cost, to bring better user experience.

The STM32WB platform is an evolution of the well‐known market-leading STM32L4 ultra‑low‑power series of MCUs. It provides the same digital and analog peripherals suitable for applications requiring extended battery life and complex functionalities.

STM32WB proposes a variety of communication assets, a practical crystal-less USB2.0 FS interface, audio support, an LCD driver, up to 72 GPIOs, an integrated SMPS for power consumption optimization, and multiple low-power modes to maximize battery life.

On top of wireless and ultra‐low‐power aspects, a particular focus was placed on embedding security hardware functions such as a 256‐bit AES, PCROP, JTAG Fuse, PKA (elliptic curve encryption engine), and Root Secure Services (RSS). The RSS allows authenticating OTA communications, regardless of the radio stack or application.

The STM32WB55 Bluetooth 5 -certified device offers Mesh 1.0 software support, multiple profiles and flexibility to integrate proprietary BLE stacks.

OpenThread-certified software stack is available. The radio can also run BLE/OpenThread protocols concurrently. The embedded generic MAC allows the usage of other IEEE 802.15.4 proprietary stacks like ZigBee®, or proprietary protocols, giving even more options for connecting devices to the Internet of Things (IoT).

The STM32WB55xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy SIG specification v5.0 and with IEEE 802.15.4-2011. They contain a dedicated Arm® Cortex® -M0+ for performing all the real-time low layer operation.

The STM32WB55xx devices are designed to be extremely low-power and are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. The Cortex®-M4 core features a Floating point unit (FPU) single precision that supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.

Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.

The STM32WB55xx devices embed high-speed memories (Flash memory up to 1 Mbyte, up to 256 Kbyte of SRAM), a Quad-SPI Flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.

Direct data transfer between memory and peripherals and from memory to memory is supported by 14 DMA channels with a full flexible channel mapping by the DMAMUX peripheral.

The STM32WB55xx devices embed several mechanisms for embedded Flash memory and SRAM: readout protection, write protection and proprietary code readout protection. Portions of the memory can be secured for Cortex® -M0+ exclusive access.

The two AES encryption engines, PKA and RNG enable lower layer MAC and upper layer cryptography. A customer key storage feature may be used to keep the keys hidden.

The devices offer one fast 16-bit ADC and two ultra-low-power comparators associated with a high accuracy reference voltage generator

The STM32WB55xx devices embed a low-power RTC, one advanced 16-bit timer, one general-purpose 32-bit timer, two general-purpose 16-bit timers, and two 16-bit low-power timers.

In addition, up to 28 capacitive sensing channels are available. The devices also embed an integrated LCD driver up to 8x40 or 4x44, with internal step-up converter.

They also feature standard and advanced communication interfaces:

The STM32WB55xx operate in the -40 to +105 °C (+125 °C junction) temperature range from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications.

The STM32WB55xx integrate a high efficiency SMPS step-down converter. It includes independent power supplies for analog input for ADC and comparators, as well as a 3.3 V dedicated supply input for USB.

A VBAT dedicated supply allows the devices to back up the LSE 32.768KHz oscillator, the RTC and the backup registers, thus enabling the STM32WB55xx to supply these functions even if the main VDD is not present through a CR2032-like battery, a Supercap or a small rechargeable battery.

The STM32WB55xx family offers three packages, from 48 to 100 pins.

Key Features

• Includes ST state-of-the-art patented technology
• Radio
  • 2.4 GHz RF transceiver supporting Bluetooth® specification v5.0 and IEEE 802.15.4-2011 PHY and MAC
  • RX Sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -100 dBm (802.15.4)
  • Programmable output power up to +6 dBm with 1 dB steps
  • Integrated balun to reduce BOM
  • Support for 2 Mbps
  • Dedicated Arm® 32-bit Cortex® M0 + CPU for real-time Radio layer
  • Accurate RSSI to enable power control
  • Compliant with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
• Ultra-low-power platform
  • 1.71 V to 3.6 V power supply
  • – 40 °C to 85 / 105 °C temperature ranges
  • 30 nA shutdown mode
  • 600 nA Standby mode + RTC + 32 KB RAM
  • 1.8 μA Stop mode + RTC + 256 KB RAM
  • Active-mode MCU + RF (SMPS ON): < 50 μA/MHz
  • RX: 3.8 mA
  • TX at 0 dBm: 5.5 mA
• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait-state execution from Flash memory, frequency up to 64 MHz, MPU, 80 DMIPS and DSP instructions
• Supply and Reset management
  • High efficiency embedded SMPS step-down converter
  • Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
  • Ultra-low-power POR/PDR
  • Programmable voltage detector (PVD)
  • VBAT mode with RTC and backup registers
• Clock sources
  • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
  • 32 kHz crystal oscillator for RTC (LSE)
  • Internal low-power 32 kHz (±5%) RC (LSI1)
  • Internal low-power 32 kHz (stability ±500 ppm) RC (LSI2)
  • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
  • High Speed internal 16 MHz factory trimmed RC (±1%)
  • 2x PLL for system clock, USB, SAI and ADC
• Memories
  • Up to 1 MB Flash with sector protection (PCROP) against R/W operations, enabling authentic Bluetooth® Low Energy and 802.15.4 SW stack
  • Up to 256 KB RAM, including 64 KB with hardware parity check
  • 20x32-bit Backup Register
  • Boot loader supporting, USART, SPI, I2C and USB interfaces
  • OTA (Over the Air) Bluetooth® Low Energy and 802.15.4 update
  • Quad SPI memory interface with XIP
• Rich Analog peripherals (down to 1.62 V)
  • 12-bit ADC 4.26Msps, up to 16-bit with hardware oversampling, 200 μA/Msps
  • 2x ultra-low-power comparator
  • Accurate 2.5 V or 2.048 V reference voltage buffered output
• System peripherals
  • Inter Processor Communication Controller (IPCC) for communication with Bluetooth® Low Energy and 802.15.4
  • HW semaphores for resources sharing between CPUs
  • 2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, Timers
  • 1x USART (ISO 7816, IrDA, SPI Master, Modbus and Smartcard mode)
  • 1x LPUART (Low Power)
  • 2x SPI 32 Mbit/s
  • 2x I2C (SMBus/PMBus)
  • 1x SAI (dual channels)
  • 1x USB 2.0 FS device, crystal-less, BCD and LPM
  • Touch Sensing controller, up to 28 channels
  • LCD 8x40 with step-up converter
  • 1x 16-bit, four channels advanced timer
  • 2x 16-bits, two channels timer
  • 1x 32-bits, four channels timer
  • 2x 16-bits ultra-low-power timer
  • 1x independent Systick
  • 1x independent watchdog
  • 1x window watchdog
• Security & ID
  • Secure Firmware Installation (SFI) for Bluetooth® Low Energy and 802.15.4 SW stack
  • Hardware Encryption AES 256-bit
  • Customer key storage / key manager services
  • HW Public Key Authority (PKA)
  • Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
  • True random number generator (TRNG)
  • Sector protection against R/W operation (PCROP)
  • CRC calculation unit
  • 96-bit unique ID
  • 64-bit unique ID. Possibility to derive 802.15.5 64-bit and Bluetooth® Low Energy 48-bit EUI
• Up to 72 fast I/Os, 70 of them 5 V-tolerant
• Development support
  • Serial wire debug (SWD), JTAG for the Application processor
  • Application cross trigger with input and output
  • Embedded Trace Macrocell™ for application
• All packages are ECOPACK2® compliant